
Kingston Hyper-X Fury DDR3L-1866 4GB - Black
R 2 115.00
Takealot ยท checked 5 days ago
- Average
- R 2 115.00
- Lowest seen
- R 2 115.00
- Highest seen
- R 2 115.00
- Last change
- R 0.00
- First indexed
- 21 Sep 2026
- Retailer
- Takealot
Description
Kingston Hyper-X Fury DDR3L-1866 4GB - Black.
Features:
- JEDEC standard
- 1.35V and 1.5V Power Supply VDDQ = 1.35V and 1.5V 933MHz FCK for 1866Mb/sec/pin 8 independent internal bank
- Programmable CAS Latency: 13, 11, 10, 9, 8, 7, 6
- Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch
- Burst Length: 8 (Interleave without any limit, sequential with starting address 000 only)
- 4 with TCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS)
- Bi-directional Differential Data Strobe
- Internal (self) calibration: Internal self-calibration through ZQ pin (RZQ: 240 ohm 1%)
- On Die Termination using ODT pin
- Average Refresh Period: 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE 95C
- Asynchronous Reset Height: 1.291 (32.80mm) w/heatsink, single sided component
Specifications:
- CL (IDD) 10 cycles Row Cycle Time (TRCmin) 44.75ns (min.)
- Refresh to Active/Refresh 260ns (min.) Command Time (tRFCmin) Row Active Time (tRASmin) 32.125ns (min.)
- Maximum Operating Power TBD W
- UL Rating 94 V - 0 Operating Temperature 0o C to 85o C Storage Temperature -55o C to +100o C
- Power will vary depending on the SDRAM used
Features:
- JEDEC standard
- 1.35V and 1.5V Power Supply VDDQ = 1.35V and 1.5V 933MHz FCK for 1866Mb/sec/pin 8 independent internal bank
- Programmable CAS Latency: 13, 11, 10, 9, 8, 7, 6
- Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch
- Burst Length: 8 (Interleave without any limit, sequential with starting address 000 only)
- 4 with TCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS)
- Bi-directional Differential Data Strobe
- Internal (self) calibration: Internal self-calibration through ZQ pin (RZQ: 240 ohm 1%)
- On Die Termination using ODT pin
- Average Refresh Period: 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE 95C
- Asynchronous Reset Height: 1.291 (32.80mm) w/heatsink, single sided component
Specifications:
- CL (IDD) 10 cycles Row Cycle Time (TRCmin) 44.75ns (min.)
- Refresh to Active/Refresh 260ns (min.) Command Time (tRFCmin) Row Active Time (tRASmin) 32.125ns (min.)
- Maximum Operating Power TBD W
- UL Rating 94 V - 0 Operating Temperature 0o C to 85o C Storage Temperature -55o C to +100o C
- Power will vary depending on the SDRAM used